// -----------------------------------------------------------------------------
// Copyright (c) 2014-2023 All rights reserved
// -----------------------------------------------------------------------------
// Author 		: HiDark 1173296519@qq.com
// File   		: top_sram_ctr_ahb.v
// Create 		: 2023-12-26 10:26:59
// Description	: 
// Editor 		: tab size (4)
// -----------------------------------------------------------------------------
module top_sram_ctr_ahb
(
    // Inputs
    input           clk,
    input           rst_n,
    input           hwrite,
    input   [1:0]   htrans,
    input   [2:0]   hsize,
    input   [31:0]  haddr,
    input   [2:0]   hburst,
    input   [31:0]  hwdata,
    input   [31:0]  sram_q,
    // Outputs    
    output  reg        hready,
    output  reg[1:0]   hresp,
    output  reg[31:0]  hrdata,
    output  reg        sram_csn,
    output  reg        sram_wen,
    output  reg[11:0]  sram_a,
    output  reg[31:0]  sram_d
);

reg           hwrite_r;
reg   [1:0]   htrans_r;
reg   [2:0]   hsize_r;
reg   [31:0]  haddr_r;
reg   [2:0]   hburst_r;
reg   [31:0]  hwdata_r;
reg   [31:0]  sram_q_r;
    // Outputs    
wire          hready_w;
wire  [1:0]   hresp_w;
wire  [31:0]  hrdata_w;
wire          sram_csn_w;
wire          sram_wen_w;
wire  [11:0]  sram_a_w;
wire  [31:0]  sram_d_w;
always @(posedge clk ) begin 
	hwrite_r <= hwrite;
	htrans_r <= htrans;
	hsize_r  <= hsize;
	haddr_r  <= haddr;
	hburst_r <= hburst;
	hwdata_r <= hwdata;
	sram_q_r <= sram_q;

	hready   <= hready_w;
	hresp    <= hresp_w;
	hrdata   <= hrdata_w;
	sram_csn <= sram_csn_w;
	sram_wen <= sram_wen_w;
	sram_a <= sram_a_w;
	sram_d <= sram_a_w;
end

	sram_ctr_ahb inst_sram_ctr_ahb (
			.hclk     (clk),
			.hresetn  (rst_n),
			.hwrite   (hwrite_r),
			.htrans   (htrans_r),
			.hsize    (hsize_r),
			.haddr    (haddr_r),
			.hburst   (hburst_r),
			.hwdata   (hwdata_r),
			.sram_q   (sram_q_r),
			.hready   (hready_w),
			.hresp    (hresp_w),
			.hrdata   (hrdata_w),
			.sram_csn (sram_csn_w),
			.sram_wen (sram_wen_w),
			.sram_a   (sram_a_w),
			.sram_d   (sram_d_w)
		);
endmodule